Abstract

The method presented in this paper uses a generic C-language written simulation model of an embedded distributed computer system aimed for a safety-critical control application. The considered system is built using Time Triggered Architecture (TTA) concepts. The aim of the presented simulation method is to evaluate the system capability to tolerate a chosen category of faults. The model, being written in ANSI-C, is portable and machine-independent. Its structure is modular and flexible, so that the system to be studied and the experiment setting can easily be changed. The functionality of this model is demonstrated on a set of fault injection experiments aimed mainly to evaluate the correctness of the Time Triggered Protocol (TTP/C) that implements the abstract concepts of TTA. These experiments were done within the EU/IST project Fault Injection for Time triggered architecture (FIT).

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Cite this article

@article{cai-1306,
  author  = {Stanislav Racek and Pavel Herout and Jan Hlavička},
  title   = {Dependability Evaluation of Time Triggered Architecture Using Simulation},
  journal = {Computing and Informatics},
  volume  = {23},
  number  = {1},
  pages   = {51--76},
  year    = {2004},
  issn    = {1335-9150},
  url     = {https://cai.type.sk/content/2004/1/dependability-evaluation-of-time-triggered-architecture-using-simulation/}
}
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