Abstract

In this article we present a simulator of non-deterministic static P systems using Field Programmable Gate Array (FPGA) technology. Its major feature is a high performance, achieving a constant processing time for each transition. Our approach is based on representing all possible applications as words of some regular context-free language. Then, using formal power series it is possible to obtain the number of possibilities and select one of them following a uniform distribution, in a fair and non-deterministic way. According to these ideas, we yield an implementation whose results show an important speed-up, with a strong independence from the size of the P system.

Keywords

MSC

94-04, 68-04, 68U20

Cite this article

@article{cai-1665,
  author  = {Juan Quiros and Sergey Verlan and Julian Viejo and Alejandro Millan and Manuel J. Bellido},
  title   = {Fast Hardware Implementations of Static P Systems},
  journal = {Computing and Informatics},
  volume  = {35},
  number  = {3},
  pages   = {687--718},
  year    = {2016},
  issn    = {1335-9150},
  url     = {https://cai.type.sk/content/2016/3/fast-hardware-implementations-of-static-p-systems/}
}
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