Abstract
In this paper, we consider memory-mapping problems in High-Level Synthesis. We focus on the port mapping, bit-width mapping and word mapping, respectively. A 0-1 Integer Linear Programming (ILP) technique is used to solve the mapping problems, which synthesizes the source memory using one or more memory modules from a target memory library at a higher level. This method can not only perform bit-width mapping and word mapping, but it can also perform port mapping at the same time. Experimental results indicate that ILP approach is an effective method for memory reuse in high-level synthesis.
Keywords
Cite this article
@article{cai-1301,
author = {Haifeng Zhou and Zhenghui Lin and Wei Cao},
title = {High-Level Technology Mapping for Memories},
journal = {Computing and Informatics},
volume = {22},
number = {5},
pages = {427--438},
year = {2003},
issn = {1335-9150},
url = {https://cai.type.sk/content/2003/5/high-level-technology-mapping-for-memories/}
}
TY - JOUR AU - Haifeng Zhou AU - Zhenghui Lin AU - Wei Cao TI - High-Level Technology Mapping for Memories JO - Computing and Informatics VL - 22 IS - 5 SP - 427 EP - 438 PY - 2003 SN - 1335-9150 UR - https://cai.type.sk/content/2003/5/high-level-technology-mapping-for-memories/ KW - Circuit CAD KW - digital circuit design KW - high-level synthesis KW - technology mapping ER -
Zhou, H., Lin, Z., & Cao, W. (2003). High-Level Technology Mapping for Memories. Computing and Informatics, 22(5), 427–438. https://cai.type.sk/content/2003/5/high-level-technology-mapping-for-memories/