Content 5-6/2004

Vol. 23, 2004, No. 5-6

This number contains 8 articles.

Performance Evaluation and Implementation of two Adaptive Routing Algorithms for XGFT Networks
Heikki Kariniemi, Jari Nurmi
pp. 415–435
A Flip-Flop Matching Engine to Verify Sequential Optimizations
Solaiman Rahim, Bruno Rouzeyre, Lionel Torres
pp. 437–460
An Evolvable Combinational Unit for FPGAs
Lukáš Sekanina, Štěpán Friedl
pp. 461–486
An FPGA Implementation of a Montgomery Multiplier Over GF(2m)
Nele Mentens, Siddika Berna Ӧrs, Bart Preneel, Joos Vandewalle
pp. 487–499
A Simple PLL-Based True Random Number Generator for Embedded Digital Systems
Miloš Drutarovský, Martin Šimka, Viktor Fischer, Frédéric Celle
pp. 501–515
A Generic Dual Core Architecture with Error Containment
Thomas Kottke, Andreas Steininger
pp. 517–535
Built-In Self-Test Quality Assessment Using Hardware Fault Emulation In FPGAs
Abílio Parreira, J. Paulo Teixeira, Marcelino B. Santos
pp. 537–556
Knapsack Model and Algorithm for Hardware/Software Partitioning Problem
Abhijit Ray, Wu Jigang, Thambipillai Srikanthan
pp. 557–569